Course Syllabus

Catalog Description

EECS 159A / CSE 181A: SENIOR DESIGN PROJECT I (Credit Units: 3)

Teaches problem definition, detailed design, integration, and testability with teams of students specifying, designing, building, and testing complex systems. Lectures include engineering values, discussions, and ethical ramifications of engineering decisions. Prerequisite: EECS 113 or EECS 170C or CSE 145A or COMPSCI 145A. Electrical Engineering (EE), Computer Engineering (CpE), and Computer Science and Engineering (CSE) majors have first consideration for enrollment.

Restriction Removed: "ECS 159A-B-CW/CSE 181A-B-CW must be taken in the same academic year."

EECS 159B / CSE 181B SENIOR DESIGN PROJECT II (Credit Units: 3)

Teaches problem definition, detailed design, integration and testability with teams of students specifying, designing, building, and testing complex systems. Prerequisite: EECS 159A / CSE 181A. Electrical Engineering (EE), Computer Engineering (CpE), and Computer Science and Engineering (CSE) majors have first consideration for enrollment.

Restriction Removed: "EECS 159A-B-CW must be taken in the same academic year."

How to Enroll:

TA for EECS 159A / CSE 181A

Lab: (location to be announced; was EH 1130)

• Seyede Mahya Safavi
• Subramanian Meenakshi Sundaram
• Haeseung Lee
• Wael Elsharkasy

Assignments

Assignments will be mostly in the form of weekly written assignments jointly submitted by the team.

• completeness of reporting
• ability to state the problems clearly and novelty

Resources

• EEE Canvas Site for EECS-CSE projects, https://canvas.eee.uci.edu/courses/2588/ for assignments, course materials on project planning, etc
• EECS-CSE Senior Projects Portal, http://srproj.eecs.uci.edu/ for public project pages, posts by mentors and students, and general forums (not limited to the class)

Lecture Topics

• (09/23) Course Overview: Introduction: teams, mentors, paper project

1. (09/30) Application: Attendance System
2. (10/07) Specification - early stage
3. (10/15) MCU-based system design
4. (10/21) Layers of Communication
5. (10/28) Design Refinement
6. (11/04) Project Tasks
7. (11/11) Project Planning and tools
8. (11/18) Engineering standards, Ethics in engineering, IP
   • Ethics in Engineering (Prof. Michael Green) slides
   • Engineering Standards (Jeff Foresta) notes and slides, 
   • Intellectual Property (Jeff Foresta) notes and slides
9. (11/25) (no class - Thanksgiving)
10. (12/02) (no class - Fall Design Review poster session) 

Grading

EECS 159A / CSE 181A

The grade will be given by the centrally administered Senior Projects “A” course. The breakdown is

• 50% weekly reports
• 30% project plan and work with mentor
• 20% class participation, including attendance and peer evaluation

EECS 159B / CSE 181B

(new! For AY 2016-2017) The “B” course will no longer be administered centrally, but each group will sign up for the EECS 159B/CSE 181B course under their mentor’s name. The grade will be given by the mentor directly. Contact the individual mentors for their grading policy.

Academic Honesty

Academic dishonesty will not be tolerated. See the Academic Integrity chapter in the Appendix of the UCI General Catalogue.

Written Assignments

For this course, your written assignments must be original writing and drawing by you and your team. You may quote other sources, but you must provide proper credit. If you must include figures, photos, illustrations, or tables from other sources, you must include proper credit and obtain permission from the original authors, or you must redraw them yourself and include a reference. Written assignments must be turned in using turnitin.com, which will check similarity with documents that can be found on the Internet. Writing that is clearly plagiarized will receive a 0 score, and the incident will be reported to the Dean’s office. Repeat offenders will have records shown on their transcript.

In general, if you do your own writing, you have nothing to worry about, because the probability of matching another document will be practically zero.

Design Files

You may use schematics or source code as starting points for your project, but you must acknolwedge your sources and clearly state your contributions. You may not use existing designs or code verbatim as your own work.