Course Syllabus

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Course Description

EECS 222: Embedded System Modeling (4)
Computation models for embedded systems. System-level specification and description languages. Concepts, requirements, examples. Embedded system models at different levels of abstraction. Modeling of test benches, design under test, IP components. Discrete event simulation, semantics, and algorithms.

Course Objectives and Outcomes

Course objectives represent what the course strives to accomplish.
Course outcomes represent what will be measured to determine if the course met it's objectives.

  • Course Objective:

    • For students to learn concepts in modeling of embedded systems at different abstraction levels using system-level description languages (SLDL).

  • Course Outcomes:

    • Students are able to model embedded systems at different levels of abstraction.
    • Students are able to describe embedded system models in a SLDL.
    • Students are able to simulate, test and debug embedded system models.

Course Resources

Course Contents

  • The class meets for 3 hours of lecture each week for 10 weeks.
      Topic Reading
    1 Embedded system concepts, abstraction levels, computational models Yellow book, Chapter 1 through 1.4
    Green book, Chapters 1 and 2
    Orange book, Chapter 1
    2 The SpecC system-level description language Yellow book, Chapter 1.5 and 1.6
    Green book, Chapter 3
    3 The SystemC system-level description language Blue-red book, Chapter 1 through 14
    Black book, Chapter 2
    SystemC Standard LRM IEEE 1666-2011
    4 Embedded system specification, modeling guidelines Yellow book, Chapter 2 through 2.2
    Green book, Chapter 4 through 4.2.1
    5 Validation, execution and simulation semantics Yellow book, Appendix A
    SpecC Language Reference Manual V2.0
    Black book, Chapter 2.10
    6 Top-down system design methodology Yellow book, Chapter 2
    Green book, Chapter 4
    Orange book, Chapter 2
    7 System-level architecture modeling Yellow book, Chapters 2.3 and 2.4
    Green book, Chapter 4.2.2
    Orange book, Chapter 3 through 3.4
    8 Embedded system communication modeling Yellow book, Chapters 2.5 and 2.6
    Green book, Chapter 4.2.3
    Orange book, Chapter 3.5 and 3.6
    9 Cycle-accurate modeling, implementation Yellow book, Chapters 2.7 and 2.8
    Green book, Chapter 4.2.4
    Orange book, Chapter 6
    10 UML and other system-level description languages UML 2.0 Superstructure
  • Note that the ordering of topics is tentative and may change!
  • Please see the Schedule page for up-to-date scheduling information.

Course Policies

  • In-Person Course:

    This course meets the requirements of an "in-person course" as defined by UCI leadership. Instruction takes place in hybrid/dual-delivery fashion where some course elements are in-person and some are online/remote. For instance, the lectures can be followed remotely and/or online, while the modeling of the chosen application example in the lab session is required as an in-person engagement.
    Note that the place of the course lectures and lab sessions is marked as "TBA" in WebSOC while department schedulers work towards physical room assignment with the registrars office. This is standard procedure on UCI campus.

  • COVID-19 Health Guidelines:

    This course follows all health guidelines defined by the UCI campus, which are available online here. Alternatively, a local document is available here as well.

  • COVID-19 Reporting:

    This course follows the reporting guidelines defined by the UCI campus, which are available online here. Alternatively, a local document is available here as well.

  • Attendance Policy:

    Attendance and active participation in class is required. Attendance is taken with a sign-in sheet for all in-person meetings (for COVID-19 contact tracing purposes, if/when needed).
    It is the student's responsibility to make up for any missed instruction or assignments. Substitute assignments or exams will only be arranged for absence due to documented medical (or similar) reasons. Proper documentation is required.

  • Computing server:

    Linux is the standard computing platform used for this course. A central computer infrastructure is provided and students may remote login to the server at any time (24/7). All processes run on the EECS Linux servers, such as crystalcove.eecs.uci.edu and other beaches. SSH protocol and a suitable SSH client is needed to login to the server.

  • Project assignments:

    A selected embedded application will serve as a continuous example for a sequence of modeling and simulation tasks. Assignments are listed on the Project web page and may be assigned on a weekly or bi-weekly basis. Detailed submission instructions and due dates will be listed with each assignment. Assignments are generally due on Wednesday at 6pm, unless indicated otherwise on the project web page.
    The submission deadline is hard. The server clock is used as reference clock. Work turned in late will not be graded and receive no credit.

  • Exams:

    The course includes one final examination. Final examinations are administered during examination week as announced in the UCI Schedule of Classes.

  • Grading Policy:

    The final grade for the course will be determined based on the scores achieved in the assignments and the final examination, as follows:
    • 50% Project assignments
    • 50% Final examination

  • Academic Honesty:

    Academic integrity, as published by the Office of Academic Integrity and Student Conduct (AISC), is a requirement for passing this class. Any student who compromises the academic integrity of this course is subject to a failing grade. Submitted work must be the own original work of the student.
    Academic dishonesty includes, but is not limited to copying answers from another student, allowing another student to copy your answers, communicating exam answers to other students during an exam, attempting to use notes or other aids during an exam, or tampering with an exam after it has been corrected and then returning it for more credit.
    Do not copy any code from or share code with other students! If you do so, you will be in violation of the UCI Policies on Academic Honesty. It is your responsibility to read and understand these policies. Note that any instance of academic dishonesty will be reported to AISC for disciplinary action and is cause for a failing grade in the course.

  • Course Material:

    All course material is for use in the context of this course only. Selling, preparing, or distributing for any commercial purpose course lecture notes or video or audio recordings of any course unless authorized by the University in advance and explicitly permitted by the course instructor in writing. The unauthorized sale or commercial distribution of course notes or recordings by a student is a violation of these Policies whether or not it was the student or someone else who prepared the notes or recordings.

Course Summary:

Date Details Due