Welcome!
Welcome to EECS 298: System-on-Chip Design (Fall 2024)!
Course Information
Instructor: Sitao Huang (sitaoh@uci.edu)
Office Hours: Thursdays 1:30-2:30pm, EH 3225 or by appointment
Lecture Time: Tuesdays/Thursdays 9:30-10:50 am
Lecture Location: HH 118
Lectures
Week |
Lecture |
Slides |
Recordings |
1 |
Introduction
Hardware Design
|
lec1-introduction.pdf
Download lec1-introduction.pdf
lec2-hardware-design.pdf
Download lec2-hardware-design.pdf
|
9/26
Links to an external site., 10/1
Links to an external site., 10/3
Links to an external site. |
2 |
High-Level Synthesis |
lec3-high-level-synthesis.pdf
Download lec3-high-level-synthesis.pdf |
10/8
Links to an external site., 10/10
Links to an external site. |
3 |
SoC FPGA |
lec4-soc-fpga.pdf
Download lec4-soc-fpga.pdf |
10/15
Links to an external site., 10/17
Links to an external site. |
4 |
Embedded Systems |
lec5-embedded-systems.pdf
Download lec5-embedded-systems.pdf |
10/22
Links to an external site., 10/24
Links to an external site. |
5 |
DL Accelerators |
|
10/29, 10/31 |
6 |
Embedded Systems |
lec5-embedded-systems.pdf
Download lec5-embedded-systems.pdf |
11/5
Links to an external site., 11/7
Links to an external site. |
7 |
System Modeling
|
lec7-system-modeling.pdf
Download lec7-system-modeling.pdf |
11/12
Links to an external site., 11/14
Links to an external site. |
8 |
SoC Design Methodology
System Synthesis
|
lec8-design-method.pdf
Download lec8-design-method.pdf
lec9-sys-syn.pdf
Download lec9-sys-syn.pdf
|
11/19
Links to an external site., 11/21
Links to an external site. |
9 |
Deep Learning Acceleration |
lec6-deep-learning-accel.pdf
Download lec6-deep-learning-accel.pdf
Papers:
paper1: Optimizing FPGA-based Accelerator Design for Deep Convolutional Neural Networks.pdf
Download Optimizing FPGA-based Accelerator Design for Deep Convolutional Neural Networks.pdf
paper2: An OpenCL Deep Learning Accelerator on Arria 10.pdf
Download An OpenCL Deep Learning Accelerator on Arria 10.pdf
paper3: Accelerating Binarized Convolutional Neural Networks with Software-Programmable FPGAs.pdf
Download Accelerating Binarized Convolutional Neural Networks with Software-Programmable FPGAs.pdf
paper4: FPGA-DNN Co-Design An Efficient Design Methodology for IoT Intelligence on the Edge.pdf
Download FPGA-DNN Co-Design An Efficient Design Methodology for IoT Intelligence on the Edge.pdf
|
11/26
Links to an external site. |
10 |
|
|
12/3
Links to an external site., 12/5 |
References
References Page